(address . 78016@debbugs.gnu.org)
2959c6b6d45577cfd1d6e61a86e2f3be14baf32c.1745573433.git.csantosb@inventati.org
From: Cayetano Santos via Guix-patches via <guix-patches@gnu.org>
* gnu/packages/electronics.scm (symbiyosys): New variable.
Change-Id: I1a3758e4bf46fc6d57ef63a0c0f5f2e39a862c4d
Signed-off-by: Cayetano Santos <csantosb@inventati.org>
---
gnu/packages/electronics.scm | 67 +++++++++++++++++++++++++++++++++++-
1 file changed, 66 insertions(+), 1 deletion(-)
Toggle diff (103 lines)
diff --git a/gnu/packages/electronics.scm b/gnu/packages/electronics.scm
index 12e44f234a..5ca28607b5 100644
--- a/gnu/packages/electronics.scm
+++ b/gnu/packages/electronics.scm
@@ -46,6 +46,7 @@ (define-module (gnu packages electronics)
#:use-module (gnu packages documentation)
#:use-module (gnu packages embedded)
#:use-module (gnu packages fontutils)
+ #:use-module (gnu packages fpga)
#:use-module (gnu packages gl)
#:use-module (gnu packages glib)
#:use-module (gnu packages graphviz)
@@ -54,6 +55,7 @@ (define-module (gnu packages electronics)
#:use-module (gnu packages libusb)
#:use-module (gnu packages linux)
#:use-module (gnu packages m4)
+ #:use-module (gnu packages maths)
#:use-module (gnu packages pkg-config)
#:use-module (gnu packages python)
#:use-module (gnu packages python-build)
@@ -67,7 +69,8 @@ (define-module (gnu packages electronics)
#:use-module (gnu packages swig)
#:use-module (gnu packages tls)
#:use-module (gnu packages toolkits)
- #:use-module (gnu packages version-control))
+ #:use-module (gnu packages version-control)
+ #:use-module (gnu packages xml))
(define-public comedilib
(package
@@ -635,6 +638,68 @@ (define-public sigrok-firmware-fx2lafw
them usable as simple logic analyzer and/or oscilloscope hardware.")
(license license:gpl2+))))
+(define-public symbiyosys
+ (package
+ (name "symbiyosys")
+ (version "0.52")
+ (source
+ (origin
+ (method git-fetch)
+ (uri (git-reference
+ (url "https://github.com/YosysHQ/sby/")
+ (commit (string-append "v" version))))
+ (file-name (git-file-name name version))
+ (sha256
+ (base32 "06nhkmnl9ymp1wxapc0lnj82knj5q43x0s2rmfshwvs4cijzqm7f"))))
+ (build-system gnu-build-system)
+ (arguments
+ (list
+ #:test-target "test"
+ #:make-flags #~(list (string-append "PREFIX=" #$output))
+ #:phases #~(modify-phases %standard-phases
+ (delete 'configure)
+ (delete 'build)
+ ;; TODO: build docs, after furo-ys is packaged.
+ ;; (add-after 'install 'build-info
+ ;; (lambda _
+ ;; (invoke "make" "-C" "docs" "info")))
+ (add-before 'check 'git-init
+ (lambda _
+ (invoke "git" "init"))) ;check expects a git repo
+ (add-after 'git-init 'patch-/usr/bin/env
+ (lambda* (#:key inputs #:allow-other-keys)
+ (substitute* "sbysrc/sby_core.py"
+ (("\"/usr/bin/env\", ")
+ ""))
+ (substitute* "sbysrc/sby.py"
+ (("/usr/bin/env python")
+ (search-input-file inputs "bin/python3")))))
+ ;; The tests related to abc binary used by yosys produce errors
+ ;; Disable them
+ (add-after 'patch-/usr/bin/env 'disable-abc-tests
+ (lambda _
+ (delete-file "tests/keepgoing/keepgoing_multi_step.sby")
+ (delete-file-recursively "docs/examples/demos")
+ (delete-file
+ "tests/regression/aim_vs_smt2_nonzero_start_offset.sby"))))))
+ (inputs (list abc yosys))
+ (native-inputs (list
+ ;; TODO: see above build-info phase comment.
+ ;; python-sphinx python-sphinx-argparse texinfo
+ boolector
+ git-minimal/pinned
+ python
+ python-click
+ python-xmlschema
+ yices
+ z3))
+ (home-page "https://github.com/YosysHQ/sby/")
+ (synopsis "Formal hardware verification with yosys")
+ (description
+ "SimbyYosys is a front-end program for yosys-based formal hardware verification
+flows.")
+ (license license:isc)))
+
(define-public uhdm
(package
(name "uhdm")
base-commit: 501a9603f5e3cda07f3be8e7fecac31f7af5ce52
--
2.49.0