[PATCH] gnu: Add python-vsg.

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2 participants
  • Cayetano Santos
  • Ludovic Courtès
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unassigned
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Cayetano Santos
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normal

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C
C
Cayetano Santos wrote on 10 Mar 03:48 -0700
(address . guix-patches@gnu.org)(name . Cayetano Santos)(address . csantosb@inventati.org)
ecc24b08bdfb53e8425eb163f3ede7454d288c12.1741603691.git.csantosb@inventati.org
* gnu/packages/electronics.scm (python-vsg): New variable.

Change-Id: I373fa187e7af7ad79e5d885574ee124183d37f9b
---
gnu/packages/electronics.scm | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)

Toggle diff (57 lines)
diff --git a/gnu/packages/electronics.scm b/gnu/packages/electronics.scm
index 93e37cf9ee..c4a70565cc 100644
--- a/gnu/packages/electronics.scm
+++ b/gnu/packages/electronics.scm
@@ -31,6 +31,7 @@ (define-module (gnu packages electronics)
#:use-module (guix utils)
#:use-module (guix build-system gnu)
#:use-module (guix build-system cmake)
+ #:use-module (guix build-system pyproject)
#:use-module (gnu packages)
#:use-module (gnu packages algebra)
#:use-module (gnu packages autotools)
@@ -53,6 +54,8 @@ (define-module (gnu packages electronics)
#:use-module (gnu packages m4)
#:use-module (gnu packages pkg-config)
#:use-module (gnu packages python)
+ #:use-module (gnu packages python-build)
+ #:use-module (gnu packages python-check)
#:use-module (gnu packages python-xyz)
#:use-module (gnu packages serialization)
#:use-module (gnu packages swig)
@@ -566,3 +569,31 @@ (define-public uhdm
"UHDM is a complete modeling of the IEEE SystemVerilog Object Model with
VPI Interface, Elaborator, Serialization, Visitor and Listener.")
(license license:asl2.0)))
+
+(define-public python-vsg
+ (package
+ (name "python-vsg")
+ (version "3.30.0")
+ (source
+ (origin
+ (method git-fetch)
+ (uri (git-reference
+ (url "https://github.com/jeremiah-c-leary/vhdl-style-guide/")
+ (commit version)))
+ (file-name (git-file-name name version))
+ (sha256
+ (base32 "0kgknd491s4ldmcw9s5j38frcfs55kxfifl52svy5q0vgg1qixq1"))))
+ (build-system pyproject-build-system)
+ (native-inputs (list python-setuptools
+ python-wheel
+ ;; tests
+ python-coverage
+ python-pytest
+ python-pytest-cov
+ python-pytest-html
+ python-pytest-xdist))
+ (propagated-inputs (list python-pyyaml))
+ (home-page "https://github.com/jeremiah-c-leary/vhdl-style-guide/")
+ (synopsis "VHDL Style Guide")
+ (description "Style guide enforcement for VHDL.")
+ (license license:gpl3+)))

base-commit: 9866d32e173050ba99dc520b0a4d5aacb85e3fa0
--
2.48.1
L
L
Ludovic Courtès wrote on 21 Mar 05:39 -0700
(name . Cayetano Santos)(address . csantosb@inventati.org)(address . 76913-done@debbugs.gnu.org)
87r02q8smz.fsf@gnu.org
Cayetano Santos <csantosb@inventati.org> skribis:

Toggle quote (4 lines)
> * gnu/packages/electronics.scm (python-vsg): New variable.
>
> Change-Id: I373fa187e7af7ad79e5d885574ee124183d37f9b

Applied with the changes below, in accordance with the
synopses/descriptions guidelines.

Thanks,
Ludo’.
Toggle diff (15 lines)
diff --git a/gnu/packages/electronics.scm b/gnu/packages/electronics.scm
index c4a70565cc..ce35b19432 100644
--- a/gnu/packages/electronics.scm
+++ b/gnu/packages/electronics.scm
@@ -594,6 +594,8 @@ (define-public python-vsg
python-pytest-xdist))
(propagated-inputs (list python-pyyaml))
(home-page "https://github.com/jeremiah-c-leary/vhdl-style-guide/")
- (synopsis "VHDL Style Guide")
- (description "Style guide enforcement for VHDL.")
+ (synopsis "Coding style enforcement for VHDL")
+ (description
+ "VSG lets you define a VHDL coding style and provides a command-line tool
+to enforce it.")
(license license:gpl3+)))
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